Anti-Aliasing-Filter


 * __ Anti- Aliasing Filter __**

The anti-aliasing filter is a 5th order Chebyshev coupled-resonator filter, with a bandwidth of 700 kHz. This filter was designed to prevent aliasing in the FPGA and the ADC. Since the ADC samples at 100 MHz, the anti-aliasing filter could not allow anything beyond 25 MHz inside the digital part of the system. Thus, at 25 MHz, the filter will have attenuated any signal by over 100 dB. The coupled resonator topology provide quickly attenuating narrow band filters. In addition, it allows for the use of only one inductance value for every inductor. However, these filters require extremely high Q components. Since, the required Q to maintain unity gain is not truly realizable, the true bandwidth of the system is approximately 1 MHz, and the loss can be modeled at approximately 20 MHz. So, system gain must be added after the filter in order to make up for the loss.

Figure 4.4.1 – Anti-Aliasing Filter The circuit was prototyped, and its scattering parameters were gathered using the network analyzer. Figure 4.4.2 shows its gain characteristics, and Figure 4.4.3 shows its output reflection coefficient (which can be used to determine the output impedance). Figure 4.4.2 – Anti-Aliasing Filter Gain Figure 4.4.3 – Anti-Aliasing Filter Output Impedance